CPU/ASM/Memory.py

21 lines
431 B
Python
Raw Permalink Normal View History

2024-04-29 16:00:03 +08:00
# pylint:disable=W0622
2024-04-29 22:03:14 +08:00
import program
from error import *
2024-05-02 08:54:42 +08:00
CMDs = ["ldr", "str", 'ldrb']
2024-04-29 16:00:03 +08:00
2024-05-02 08:54:42 +08:00
def ldr(self, operand: program.Operand):
2024-04-29 22:03:14 +08:00
if operand[0].isRegister() and operand[1].isMemory():
operand[0].set(operand[1].get())
2024-04-29 16:00:03 +08:00
else:
2024-04-29 22:03:14 +08:00
raise BadOperand()
2024-04-29 16:00:03 +08:00
def str(self, operand):
2024-04-29 22:03:14 +08:00
if operand[0].isRegister() and operand[1].isMemory():
operand[1].set(operand[0].get())
2024-04-29 16:00:03 +08:00
else:
2024-04-29 22:03:14 +08:00
raise BadOperand()
2024-05-02 08:54:42 +08:00